iob33m¶
Physical Block XML¶
<!-- set: ai sw=1 ts=1 sta et -->
<pb_type name="IOB33M" num_pb="1" xmlns:xi="http://www.w3.org/2001/XInclude">
<input name="DIFFI_IN" num_pins="1"/>
<output name="DIFFO_OUT" num_pins="1"/>
<output name="I" num_pins="1"/>
<input name="IBUFDISABLE" num_pins="1"/>
<input name="INTERMDISABLE" num_pins="1"/>
<input name="KEEPER_INT_EN" num_pins="1"/>
<input name="O" num_pins="1"/>
<output name="O_OUT" num_pins="1"/>
<output name="PADOUT" num_pins="1"/>
<input name="PD_INT_EN" num_pins="1"/>
<input name="PU_INT_EN" num_pins="1"/>
<input name="T" num_pins="1"/>
<output name="T_OUT" num_pins="1"/>
<pb_type name="IOB33_MODES" num_pb="1">
<input name="DIFFI_IN" num_pins="1"/>
<output name="DIFFO_OUT" num_pins="1"/>
<output name="I" num_pins="1"/>
<input name="IBUFDISABLE" num_pins="1"/>
<input name="INTERMDISABLE" num_pins="1"/>
<input name="KEEPER_INT_EN" num_pins="1"/>
<input name="O" num_pins="1"/>
<output name="O_OUT" num_pins="1"/>
<output name="PADOUT" num_pins="1"/>
<input name="PD_INT_EN" num_pins="1"/>
<input name="PU_INT_EN" num_pins="1"/>
<input name="T" num_pins="1"/>
<output name="T_OUT" num_pins="1"/>
<xi:include href="../iob33/modes/no_ibuf.xml"/>
<xi:include href="../iob33/modes/no_obuf.xml"/>
<xi:include href="../iob33/modes/ibuf.xml"/>
<xi:include href="../iob33/modes/obuft.xml"/>
<xi:include href="../iob33/modes/iobuf.xml"/>
<mode name="OBUFTDS_M">
<xi:include href="../iob33/outpad.pb_type.xml"/>
<pb_type name="OBUFTDS_M_VPR" blif_model=".subckt OBUFTDS_M_VPR" num_pb="1">
<input name="I" num_pins="1"/>
<input name="T" num_pins="1"/>
<output name="O" num_pins="1"/>
<output name="OB" num_pins="1"/>
<delay_constant max="10e-12" in_port="I" out_port="O"/>
<delay_constant max="10e-12" in_port="I" out_port="OB"/>
<delay_constant max="10e-12" in_port="T" out_port="O"/>
<delay_constant max="10e-12" in_port="T" out_port="OB"/>
<metadata>
<meta name="fasm_params">
LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW = LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15_SLEW_SLOW
LVCMOS12_LVCMOS15_LVCMOS18_SSTL135_SSTL15.STEPDOWN = LVCMOS12_LVCMOS15_LVCMOS18_SSTL135_SSTL15_STEPDOWN
LVCMOS15_SSTL15.DRIVE.I16_I_FIXED = LVCMOS15_SSTL15_DRIVE_I16_I_FIXED
SSTL135.DRIVE.I_FIXED = SSTL135_DRIVE_I_FIXED
SSTL135_SSTL15.SLEW.FAST = SSTL135_SSTL15_SLEW_FAST
IN_TERM.UNTUNED_SPLIT_40 = IN_TERM_UNTUNED_SPLIT_40
IN_TERM.UNTUNED_SPLIT_50 = IN_TERM_UNTUNED_SPLIT_50
IN_TERM.UNTUNED_SPLIT_60 = IN_TERM_UNTUNED_SPLIT_60
PULLTYPE.PULLUP = PULLTYPE_PULLUP
PULLTYPE.PULLDOWN = PULLTYPE_PULLDOWN
PULLTYPE.NONE = PULLTYPE_NONE
PULLTYPE.KEEPER = PULLTYPE_KEEPER
</meta>
</metadata>
</pb_type>
<interconnect>
<direct name="I" input="IOB33_MODES.O" output="OBUFTDS_M_VPR.I"/>
<direct name="T" input="IOB33_MODES.T" output="OBUFTDS_M_VPR.T"/>
<direct name="O" input="OBUFTDS_M_VPR.O" output="outpad.outpad">
<pack_pattern name="OBUFTDS_M_to_outpad"/>
</direct>
<direct name="OB" input="OBUFTDS_M_VPR.OB" output="IOB33_MODES.DIFFO_OUT"/>
</interconnect>
</mode>
<mode name="IOBUFDS_M">
<xi:include href="../iob33/inpad.pb_type.xml"/>
<xi:include href="../iob33/outpad.pb_type.xml"/>
<pb_type name="IOBUFDS_M_VPR" blif_model=".subckt IOBUFDS_M_VPR" num_pb="1">
<input name="I" num_pins="1"/>
<input name="T" num_pins="1"/>
<output name="O" num_pins="1"/>
<input name="IOPAD_$inp" num_pins="1"/>
<output name="IOPAD_$out" num_pins="1"/>
<input name="IB" num_pins="1"/>
<output name="OB" num_pins="1"/>
<delay_constant max="10e-12" in_port="I" out_port="IOPAD_$out"/>
<delay_constant max="10e-12" in_port="I" out_port="OB"/>
<delay_constant max="10e-12" in_port="T" out_port="IOPAD_$out"/>
<delay_constant max="10e-12" in_port="T" out_port="OB"/>
<delay_constant max="10e-12" in_port="IB" out_port="O"/>
<delay_constant max="10e-12" in_port="IOPAD_$inp" out_port="O"/>
<metadata>
<meta name="fasm_params">
LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW = LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15_SLEW_SLOW
LVCMOS12_LVCMOS15_LVCMOS18_SSTL135_SSTL15.STEPDOWN = LVCMOS12_LVCMOS15_LVCMOS18_SSTL135_SSTL15_STEPDOWN
LVCMOS15_SSTL15.DRIVE.I16_I_FIXED = LVCMOS15_SSTL15_DRIVE_I16_I_FIXED
SSTL135.DRIVE.I_FIXED = SSTL135_DRIVE_I_FIXED
SSTL135_SSTL15.IN_DIFF = SSTL135_SSTL15_IN_DIFF
SSTL135_SSTL15.SLEW.FAST = SSTL135_SSTL15_SLEW_FAST
IN_TERM.UNTUNED_SPLIT_40 = IN_TERM_UNTUNED_SPLIT_40
IN_TERM.UNTUNED_SPLIT_50 = IN_TERM_UNTUNED_SPLIT_50
IN_TERM.UNTUNED_SPLIT_60 = IN_TERM_UNTUNED_SPLIT_60
PULLTYPE.PULLUP = PULLTYPE_PULLUP
PULLTYPE.PULLDOWN = PULLTYPE_PULLDOWN
PULLTYPE.NONE = PULLTYPE_NONE
PULLTYPE.KEEPER = PULLTYPE_KEEPER
</meta>
</metadata>
</pb_type>
<interconnect>
<direct name="I" input="IOB33_MODES.O" output="IOBUFDS_M_VPR.I"/>
<direct name="T" input="IOB33_MODES.T" output="IOBUFDS_M_VPR.T"/>
<direct name="O" input="IOBUFDS_M_VPR.O" output="IOB33_MODES.I"/>
<direct name="IOPAD_$out" input="IOBUFDS_M_VPR.IOPAD_$out" output="outpad.outpad">
<pack_pattern name="IOBUFDS_M_VPR_to_PAD"/>
</direct>
<direct name="IOPAD_$inp" input="inpad.inpad" output="IOBUFDS_M_VPR.IOPAD_$inp">
<pack_pattern name="IOBUFDS_M_VPR_to_PAD"/>
</direct>
<direct name="OB" input="IOBUFDS_M_VPR.OB" output="IOB33_MODES.DIFFO_OUT"/>
<direct name="IB" input="IOB33_MODES.DIFFI_IN" output="IOBUFDS_M_VPR.IB"/>
</interconnect>
</mode>
</pb_type>
<interconnect>
<direct name="DIFFI_IN" input ="IOB33M.DIFFI_IN" output="IOB33_MODES.DIFFI_IN"/>
<direct name="DIFFO_OUT" output="IOB33M.DIFFO_OUT" input ="IOB33_MODES.DIFFO_OUT"/>
<direct name="I" output="IOB33M.I" input ="IOB33_MODES.I"/>
<direct name="IBUFDISABLE" input ="IOB33M.IBUFDISABLE" output="IOB33_MODES.IBUFDISABLE"/>
<direct name="INTERMDISABLE" input ="IOB33M.INTERMDISABLE" output="IOB33_MODES.INTERMDISABLE"/>
<direct name="KEEPER_INT_EN" input ="IOB33M.KEEPER_INT_EN" output="IOB33_MODES.KEEPER_INT_EN"/>
<direct name="O" input ="IOB33M.O" output="IOB33_MODES.O"/>
<direct name="O_OUT" output="IOB33M.O_OUT" input ="IOB33_MODES.O_OUT"/>
<direct name="PADOUT" output="IOB33M.PADOUT" input ="IOB33_MODES.PADOUT"/>
<direct name="PD_INT_EN" input ="IOB33M.PD_INT_EN" output="IOB33_MODES.PD_INT_EN"/>
<direct name="PU_INT_EN" input ="IOB33M.PU_INT_EN" output="IOB33_MODES.PU_INT_EN"/>
<direct name="T" input ="IOB33M.T" output="IOB33_MODES.T"/>
<direct name="T_OUT" output="IOB33M.T_OUT" input ="IOB33_MODES.T_OUT"/>
</interconnect>
</pb_type>
Model XML¶
<models xmlns:xi="http://www.w3.org/2001/XInclude">
<model name="OBUFTDS_M_VPR">
<input_ports>
<port name="I" combinational_sink_ports="O OB"/>
<port name="T" combinational_sink_ports="O OB"/>
</input_ports>
<output_ports>
<port name="O"/>
<port name="OB"/>
</output_ports>
</model>
<model name="IOBUFDS_M_VPR">
<input_ports>
<port name="I" combinational_sink_ports="IOPAD_$out OB"/>
<port name="T" combinational_sink_ports="IOPAD_$out OB"/>
<port name="IOPAD_$inp" combinational_sink_ports="O"/>
<port name="IB" combinational_sink_ports="O"/>
</input_ports>
<output_ports>
<port name="O"/>
<port name="IOPAD_$out"/>
<port name="OB"/>
</output_ports>
</model>
</models>