dffe¶
Physical Block XML¶
<!-- set: ai sw=1 ts=1 sta et -->
<!-- Flip flop found inside the iCE40 -->
<pb_type name="DFF" num_pb="1">
<clock name="C" num_pins="1"/>
<input name="E" num_pins="1"/>
<input name="S" num_pins="1"/>
<input name="D" num_pins="1"/>
<output name="Q" num_pins="1"/>
<!-- module SB_DFFE (output Q, input C, E, D); -->
<mode name="SB_DFFE">
<pb_type name="SB_DFFE" num_pb="1" blif_model=".subckt SB_DFFE">
<output name="Q" num_pins="1"/>
<clock name="C" num_pins="1"/>
<input name="E" num_pins="1"/>
<input name="D" num_pins="1"/>
<T_clock_to_Q max="10e-12" port="Q" clock="C"/>
<T_setup value="10e-12" port="E" clock="C"/>
<T_setup value="10e-12" port="D" clock="C"/>
</pb_type>
<interconnect>
<direct><port type="input" from="SB_DFFE" name="Q"/><port type="output" name="Q"/></direct>
<direct><port type="input" name="C"/><port type="output" from="SB_DFFE" name="C"/></direct>
<direct><port type="input" name="E"/><port type="output" from="SB_DFFE" name="E"/></direct>
<direct><port type="input" name="D"/><port type="output" from="SB_DFFE" name="D"/></direct>
</interconnect>
</mode>
</pb_type>