symbiflow-arch-defs
symbiflow-arch-defs

idelayctrl

Physical Block XML

<!-- set: ai sw=1 ts=1 sta et -->
<pb_type name="IDELAYCTRL" blif_model=".subckt IDELAYCTRL" num_pb="1">
  <clock name="REFCLK" num_pins="1"/>
  <input name="RST" num_pins="1"/>
  <output name="RDY" num_pins="1"/>

</pb_type>

Model XML

<models>
  <model name="IDELAYCTRL">
    <input_ports>
      <!-- synchronous control inputs -->
      <port is_clock="1" name="REFCLK"/>
      <port name="RST"/>
    </input_ports>
    <output_ports>
      <port name="RDY"/>
    </output_ports>
  </model>
</models>