symbiflow-arch-defs

Table Of Contents

lutff

Physical Block XML

<!-- set: ai sw=1 ts=1 sta et -->
<pb_type name="LUTFF" num_pb="1" xmlns:xi="http://www.w3.org/2001/XInclude">
 <!-- LUT -->
 <input  name="I"     num_pins="4"/>

 <input  name="LCIN"  num_pins="1"/>
 <output name="LCOUT" num_pins="1"/>

 <!-- FF -->
 <clock  name="PCLK"        num_pins="1"/>
 <clock  name="NCLK"        num_pins="1"/>
 <clock  name="PCLK+CEN"    num_pins="1"/>
 <clock  name="NCLK+CEN"    num_pins="1"/>
 <clock  name="PCLK+SR"     num_pins="1"/>
 <clock  name="NCLK+SR"     num_pins="1"/>
 <clock  name="PCLK+CEN+SR" num_pins="1"/>
 <clock  name="NCLK+CEN+SR" num_pins="1"/>

 <input  name="EN" num_pins="1"/>
 <input  name="SR" num_pins="1"/>
 <output name="O"  num_pins="1"/>

 <!-- CARRY -->
 <input  name="FCIN"  num_pins="1"/>
 <output name="FCOUT" num_pins="1"/>

 <xi:include href="../../primitives/sb_lut/sb_lut.pb_type.xml"/>
 <xi:include href="../../primitives/sb_carry/sb_carry.pb_type.xml"/>
 <xi:include href="../../primitives/sb_ff/sb_ff.pb_type.xml"/>

 <pb_type name="ENABLE_FF" num_pb="1">
  <input  name="I" num_pins="1"/>
  <output name="O" num_pins="1"/>
  <interconnect>
   <direct name="I" input="ENABLE_FF.I" output="ENABLE_FF.O" />
  </interconnect>
  <metadata>
   <meta name="hlc_property">enable_dff</meta>
  </metadata>
 </pb_type>
 <pb_type name="DISABLE_FF" num_pb="1">
  <input  name="I" num_pins="1"/>
  <output name="O" num_pins="1"/>
  <interconnect>
   <direct name="I" input="DISABLE_FF.I" output="DISABLE_FF.O" />
  </interconnect>
  <metadata>
   <meta name="hlc_property"># disable_dff</meta>
  </metadata>
 </pb_type>

 <interconnect>
  <!-- LUT -->
  <direct name="LUT.I[0]" input="LUTFF.I[0]"               output="LUT.in[0]" />
  <direct name="LUT.I[1]" input="LUTFF.I[1]"               output="LUT.in[1]" />
  <mux    name="LUT.I[2]" input="LUTFF.LCIN[0] LUTFF.I[2]" output="LUT.in[2]" />
  <!-- Disable FCIN->I3 mux until https://github.com/verilog-to-routing/vtr-verilog-to-routing/issues/325 is fixed.
  <mux    name="LUT.I[3]" input="LUTFF.I[3] LUTFF.FCIN" output="LUT.in[3]" /> -->
  <direct name="LUT.I[3]" input="LUTFF.I[3]"               output="LUT.in[3]" />
  <direct name="LCOUT"    input="LUT.out"                  output="LUTFF.LCOUT" />

  <!-- LUT -->
  <direct name="FF.PCLK"        input="LUTFF.PCLK"        output="SB_FF.PCLK"        />
  <direct name="FF.NCLK"        input="LUTFF.NCLK"        output="SB_FF.NCLK"        />
  <direct name="FF.PCLK+CEN"    input="LUTFF.PCLK+CEN"    output="SB_FF.PCLK+CEN"    />
  <direct name="FF.NCLK+CEN"    input="LUTFF.NCLK+CEN"    output="SB_FF.NCLK+CEN"    />
  <direct name="FF.PCLK+SR"     input="LUTFF.PCLK+SR"     output="SB_FF.PCLK+SR"     />
  <direct name="FF.NCLK+SR"     input="LUTFF.NCLK+SR"     output="SB_FF.NCLK+SR"     />
  <direct name="FF.PCLK+CEN+SR" input="LUTFF.PCLK+CEN+SR" output="SB_FF.PCLK+CEN+SR" />
  <direct name="FF.NCLK+CEN+SR" input="LUTFF.NCLK+CEN+SR" output="SB_FF.NCLK+CEN+SR" />

  <direct name="FF.E"           input="LUTFF.EN"          output="SB_FF.E"           />
  <direct name="FF.R"           input="LUTFF.SR"          output="SB_FF.R"           />
  <direct name="FF.S"           input="LUTFF.SR"          output="SB_FF.S"           />
  <direct name="FF.D"           input="LUT.out"           output="SB_FF.D"            >
   <pack_pattern name="LUT+FFA"><port type="input" from="LUT" name="out"/><port type="output" from="SB_FF" name="D"/></pack_pattern>
   <pack_pattern name="LUT+FFB"><port type="input" from="LUT" name="out"/><port type="output" from="SB_FF" name="D"/></pack_pattern>
   <pack_pattern name="LUT+FFC"><port type="input" from="LUT" name="out"/><port type="output" from="SB_FF" name="D"/></pack_pattern>
   <pack_pattern name="LUT+FFD"><port type="input" from="LUT" name="out"/><port type="output" from="SB_FF" name="D"/></pack_pattern>
   <pack_pattern name="LUT+FFE"><port type="input" from="LUT" name="out"/><port type="output" from="SB_FF" name="D"/></pack_pattern>
   <pack_pattern name="LUT+FFF"><port type="input" from="LUT" name="out"/><port type="output" from="SB_FF" name="D"/></pack_pattern>
   <pack_pattern name="LUT+FFG"><port type="input" from="LUT" name="out"/><port type="output" from="SB_FF" name="D"/></pack_pattern>
   <pack_pattern name="LUT+FFH"><port type="input" from="LUT" name="out"/><port type="output" from="SB_FF" name="D"/></pack_pattern>
   <pack_pattern name="LUT+FFI"><port type="input" from="LUT" name="out"/><port type="output" from="SB_FF" name="D"/></pack_pattern>
   <pack_pattern name="LUT+FFJ"><port type="input" from="LUT" name="out"/><port type="output" from="SB_FF" name="D"/></pack_pattern>
   <pack_pattern name="LUT+FFK"><port type="input" from="LUT" name="out"/><port type="output" from="SB_FF" name="D"/></pack_pattern>
   <pack_pattern name="LUT+FFL"><port type="input" from="LUT" name="out"/><port type="output" from="SB_FF" name="D"/></pack_pattern>
   <pack_pattern name="LUT+FFM"><port type="input" from="LUT" name="out"/><port type="output" from="SB_FF" name="D"/></pack_pattern>
   <pack_pattern name="LUT+FFN"><port type="input" from="LUT" name="out"/><port type="output" from="SB_FF" name="D"/></pack_pattern>
   <pack_pattern name="LUT+FFO"><port type="input" from="LUT" name="out"/><port type="output" from="SB_FF" name="D"/></pack_pattern>
   <pack_pattern name="LUT+FFP"><port type="input" from="LUT" name="out"/><port type="output" from="SB_FF" name="D"/></pack_pattern>
   <pack_pattern name="LUT+FFQ"><port type="input" from="LUT" name="out"/><port type="output" from="SB_FF" name="D"/></pack_pattern>
   <pack_pattern name="LUT+FFR"><port type="input" from="LUT" name="out"/><port type="output" from="SB_FF" name="D"/></pack_pattern>
   <pack_pattern name="LUT+FFS"><port type="input" from="LUT" name="out"/><port type="output" from="SB_FF" name="D"/></pack_pattern>
   <pack_pattern name="LUT+FFT"><port type="input" from="LUT" name="out"/><port type="output" from="SB_FF" name="D"/></pack_pattern>
   <pack_pattern name="LUT+FFU"><port type="input" from="LUT" name="out"/><port type="output" from="SB_FF" name="D"/></pack_pattern>
  </direct>

  <direct name="DISABLE_FF" input="LUT.out" output="DISABLE_FF.I" />
  <direct name="ENABLE_FF"  input="SB_FF.Q" output="ENABLE_FF.I"  />
  <!-- Output -->
  <mux name="O" input="DISABLE_FF.O ENABLE_FF.O" output="LUTFF.O">
    <metadata>
      <meta name="fasm_mux">
	ENABLE_FF.O  = DffEnable
	DISABLE_FF.O = NULL
      </meta>
    </metadata>
  </mux>
  <!--
  <direct name="OMUX.LT" input="ENABLE_FF.O"  output="RMUX2.LT" />
  <direct name="OMUX.FF" input="DISABLE_FF.O" output="RMUX2.FF" />
  <direct name="OMUX.O"  input="RMUX2.O"      output="LUTFF.O" />
       -->

  <!-- CARRY -->
  <direct name="SB_CARRY.I0" input="LUTFF.I[1]" output="SB_CARRY.I0" />
  <direct name="SB_CARRY.I1" input="LUTFF.I[2]" output="SB_CARRY.I1" />

  <direct name="LUTFF.FCIN" input="LUTFF.FCIN" output="SB_CARRY.CI">
   <pack_pattern name="CARRYCHAIN"/>
  </direct>
  <direct name="LUTFF.FCOUT" input="SB_CARRY.CO" output="LUTFF.FCOUT">
   <pack_pattern name="CARRYCHAIN"/>
  </direct>
  <!--
  <direct name="LUTFF.FCIN" input="LUTFF.FCIN" output="SB_CARRY.CI" />
  <direct name="LUTFF.FCOUT" input="SB_CARRY.CO" output="LUTFF.FCOUT" />
  -->

 </interconnect>
</pb_type>

Table Of Contents

• lutff
  • Physical Block XML

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