dffes¶

Physical Block XML¶

<!-- set: ai sw=1 ts=1 sta et -->
<!-- Flip flop found inside the iCE40 -->
<pb_type name="DFF" num_pb="1">
 <clock  name="C" num_pins="1"/>
 <input  name="E" num_pins="1"/>
 <input  name="S" num_pins="1"/>
 <input  name="D" num_pins="1"/>
 <output name="Q" num_pins="1"/>

 <!-- module SB_DFFESR (output Q, input C, E, R, D); -->
 <mode name="SB_DFFESR">
  <pb_type name="SB_DFFESR" num_pb="1" blif_model=".subckt SB_DFFESR">
   <output name="Q" num_pins="1"/>
   <clock  name="C" num_pins="1"/>
   <input  name="E" num_pins="1"/>
   <input  name="R" num_pins="1"/>
   <input  name="D" num_pins="1"/>
   <T_clock_to_Q max="10e-12" port="Q" clock="C"/>
   <T_setup    value="10e-12" port="E" clock="C"/>
   <T_setup    value="10e-12" port="S" clock="C"/>
   <T_setup    value="10e-12" port="D" clock="C"/>
  </pb_type>
  <interconnect>
   <direct><port type="input" from="SB_DFFESR" name="Q"/><port type="output" name="Q"/></direct>
   <direct><port type="input" name="C"/><port type="output" from="SB_DFFESR" name="C"/></direct>
   <direct><port type="input" name="E"/><port type="output" from="SB_DFFESR" name="E"/></direct>
   <direct><port type="input" name="S"/><port type="output" from="SB_DFFESR" name="R"/></direct>
   <direct><port type="input" name="D"/><port type="output" from="SB_DFFESR" name="D"/></direct>
  </interconnect>
 </mode>

 <!-- module SB_DFFER (output Q, input C, E, R, D); -->
 <mode name="SB_DFFER">
  <pb_type name="SB_DFFER" num_pb="1" blif_model=".subckt SB_DFFER">
   <output name="Q" num_pins="1"/>
   <clock  name="C" num_pins="1"/>
   <input  name="E" num_pins="1"/>
   <input  name="R" num_pins="1"/>
   <input  name="D" num_pins="1"/>
   <T_clock_to_Q max="10e-12" port="Q" clock="C"/>
   <T_setup    value="10e-12" port="E" clock="C"/>
   <T_setup    value="10e-12" port="R" clock="C"/>
   <T_setup    value="10e-12" port="D" clock="C"/>
  </pb_type>
  <interconnect>
   <direct><port type="input" from="SB_DFFER" name="Q"/><port type="output" name="Q"/></direct>
   <direct><port type="input" name="C"/><port type="output" from="SB_DFFER" name="C"/></direct>
   <direct><port type="input" name="E"/><port type="output" from="SB_DFFER" name="E"/></direct>
   <direct><port type="input" name="S"/><port type="output" from="SB_DFFER" name="R"/></direct>
   <direct><port type="input" name="D"/><port type="output" from="SB_DFFER" name="D"/></direct>
  </interconnect>
 </mode>

 <!-- module SB_DFFESS (output Q, input C, E, S, D); -->
 <mode name="SB_DFFESS">
  <pb_type name="SB_DFFESS" num_pb="1" blif_model=".subckt SB_DFFESS">
   <output name="Q" num_pins="1"/>
   <clock  name="C" num_pins="1"/>
   <input  name="E" num_pins="1"/>
   <input  name="S" num_pins="1"/>
   <input  name="D" num_pins="1"/>
   <T_clock_to_Q max="10e-12" port="Q" clock="C"/>
   <T_setup    value="10e-12" port="E" clock="C"/>
   <T_setup    value="10e-12" port="S" clock="C"/>
   <T_setup    value="10e-12" port="D" clock="C"/>
  </pb_type>
  <interconnect>
   <direct><port type="input" from="SB_DFFESS" name="Q"/><port type="output" name="Q"/></direct>
   <direct><port type="input" name="C"/><port type="output" from="SB_DFFESS" name="C"/></direct>
   <direct><port type="input" name="E"/><port type="output" from="SB_DFFESS" name="E"/></direct>
   <direct><port type="input" name="S"/><port type="output" from="SB_DFFESS" name="S"/></direct>
   <direct><port type="input" name="D"/><port type="output" from="SB_DFFESS" name="D"/></direct>
  </interconnect>
 </mode>

 <!-- module SB_DFFES (output Q, input C, E, S, D); -->
 <mode name="SB_DFFES">
  <pb_type name="SB_DFFES" num_pb="1" blif_model=".subckt SB_DFFES">
   <output name="Q" num_pins="1"/>
   <clock  name="C" num_pins="1"/>
   <input  name="E" num_pins="1"/>
   <input  name="S" num_pins="1"/>
   <input  name="D" num_pins="1"/>
   <T_clock_to_Q max="10e-12" port="Q" clock="C"/>
   <T_setup    value="10e-12" port="E" clock="C"/>
   <T_setup    value="10e-12" port="R" clock="C"/>
   <T_setup    value="10e-12" port="D" clock="C"/>
  </pb_type>
  <interconnect>
   <direct><port type="input" from="SB_DFFES" name="Q"/><port type="output" name="Q"/></direct>
   <direct><port type="input" name="C"/><port type="output" from="SB_DFFES" name="C"/></direct>
   <direct><port type="input" name="E"/><port type="output" from="SB_DFFES" name="E"/></direct>
   <direct><port type="input" name="S"/><port type="output" from="SB_DFFES" name="S"/></direct>
   <direct><port type="input" name="D"/><port type="output" from="SB_DFFES" name="D"/></direct>
  </interconnect>
 </mode>
</pb_type>