symbiflow-arch-defs

Table Of Contents

common_lut_and_f78mux

Physical Block XML

<pb_type name="COMMON_LUT_AND_F78MUX" num_pb="1" xmlns:xi="http://www.w3.org/2001/XInclude">
  <input name="D1" num_pins="1"/>
  <input name="D2" num_pins="1"/>
  <input name="D3" num_pins="1"/>
  <input name="D4" num_pins="1"/>
  <input name="D5" num_pins="1"/>
  <input name="D6" num_pins="1"/>

  <input name="CX" num_pins="1"/>
  <input name="C1" num_pins="1"/>
  <input name="C2" num_pins="1"/>
  <input name="C3" num_pins="1"/>
  <input name="C4" num_pins="1"/>
  <input name="C5" num_pins="1"/>
  <input name="C6" num_pins="1"/>

  <input name="BX" num_pins="1"/>
  <input name="B1" num_pins="1"/>
  <input name="B2" num_pins="1"/>
  <input name="B3" num_pins="1"/>
  <input name="B4" num_pins="1"/>
  <input name="B5" num_pins="1"/>
  <input name="B6" num_pins="1"/>

  <input name="AX" num_pins="1"/>
  <input name="A1" num_pins="1"/>
  <input name="A2" num_pins="1"/>
  <input name="A3" num_pins="1"/>
  <input name="A4" num_pins="1"/>
  <input name="A5" num_pins="1"/>
  <input name="A6" num_pins="1"/>

  <output name="DO6" num_pins="1"/>
  <output name="CO6" num_pins="1"/>
  <output name="BO6" num_pins="1"/>
  <output name="AO6" num_pins="1"/>

  <output name="DO5" num_pins="1"/>
  <output name="CO5" num_pins="1"/>
  <output name="BO5" num_pins="1"/>
  <output name="AO5" num_pins="1"/>

  <output name="F7AMUX_O" num_pins="1"/>
  <output name="F7BMUX_O" num_pins="1"/>
  <output name="F8MUX_O"  num_pins="1"/>

  <xi:include href="Nlut/alut.pb_type.xml"/>
  <xi:include href="Nlut/blut.pb_type.xml"/>
  <xi:include href="Nlut/clut.pb_type.xml"/>
  <xi:include href="Nlut/dlut.pb_type.xml"/>
  <xi:include href="muxes/f7amux/f7amux.pb_type.xml"/>
  <xi:include href="muxes/f7bmux/f7bmux.pb_type.xml"/>
  <xi:include href="muxes/f8mux/f8mux.pb_type.xml"/>

  <interconnect>
    <!-- LUT input pins -->
    <direct name="D1" input="COMMON_LUT_AND_F78MUX.D1" output="DLUT.A1" />
    <direct name="D2" input="COMMON_LUT_AND_F78MUX.D2" output="DLUT.A2" />
    <direct name="D3" input="COMMON_LUT_AND_F78MUX.D3" output="DLUT.A3" />
    <direct name="D4" input="COMMON_LUT_AND_F78MUX.D4" output="DLUT.A4" />
    <direct name="D5" input="COMMON_LUT_AND_F78MUX.D5" output="DLUT.A5" />
    <direct name="D6" input="COMMON_LUT_AND_F78MUX.D6" output="DLUT.A6" />

    <direct name="C1" input="COMMON_LUT_AND_F78MUX.C1" output="CLUT.A1" />
    <direct name="C2" input="COMMON_LUT_AND_F78MUX.C2" output="CLUT.A2" />
    <direct name="C3" input="COMMON_LUT_AND_F78MUX.C3" output="CLUT.A3" />
    <direct name="C4" input="COMMON_LUT_AND_F78MUX.C4" output="CLUT.A4" />
    <direct name="C5" input="COMMON_LUT_AND_F78MUX.C5" output="CLUT.A5" />
    <direct name="C6" input="COMMON_LUT_AND_F78MUX.C6" output="CLUT.A6" />

    <direct name="B1" input="COMMON_LUT_AND_F78MUX.B1" output="BLUT.A1" />
    <direct name="B2" input="COMMON_LUT_AND_F78MUX.B2" output="BLUT.A2" />
    <direct name="B3" input="COMMON_LUT_AND_F78MUX.B3" output="BLUT.A3" />
    <direct name="B4" input="COMMON_LUT_AND_F78MUX.B4" output="BLUT.A4" />
    <direct name="B5" input="COMMON_LUT_AND_F78MUX.B5" output="BLUT.A5" />
    <direct name="B6" input="COMMON_LUT_AND_F78MUX.B6" output="BLUT.A6" />

    <direct name="A1" input="COMMON_LUT_AND_F78MUX.A1" output="ALUT.A1" />
    <direct name="A2" input="COMMON_LUT_AND_F78MUX.A2" output="ALUT.A2" />
    <direct name="A3" input="COMMON_LUT_AND_F78MUX.A3" output="ALUT.A3" />
    <direct name="A4" input="COMMON_LUT_AND_F78MUX.A4" output="ALUT.A4" />
    <direct name="A5" input="COMMON_LUT_AND_F78MUX.A5" output="ALUT.A5" />
    <direct name="A6" input="COMMON_LUT_AND_F78MUX.A6" output="ALUT.A6" />

    <direct name="DO6" input="DLUT.O6" output="COMMON_LUT_AND_F78MUX.DO6" />
    <direct name="DO5" input="DLUT.O5" output="COMMON_LUT_AND_F78MUX.DO5" />

    <direct name="CO6" input="CLUT.O6" output="COMMON_LUT_AND_F78MUX.CO6" />
    <direct name="CO5" input="CLUT.O5" output="COMMON_LUT_AND_F78MUX.CO5" />

    <direct name="BO6" input="BLUT.O6" output="COMMON_LUT_AND_F78MUX.BO6" />
    <direct name="BO5" input="BLUT.O5" output="COMMON_LUT_AND_F78MUX.BO5" />

    <direct name="AO6" input="ALUT.O6" output="COMMON_LUT_AND_F78MUX.AO6" />
    <direct name="AO5" input="ALUT.O5" output="COMMON_LUT_AND_F78MUX.AO5" />

    <!-- F7AMUX inputs -->
    <direct name="F7AMUX_I0" input="BLUT.O6"   output="F7AMUX.I0">
     <pack_pattern in_port="BLUT.O6" name="LUT5toLUT7" out_port="F7AMUX.I0"/>
     <pack_pattern in_port="BLUT.O6" name="LUT5toLUT8" out_port="F7AMUX.I0"/>
    </direct>
    <direct name="F7AMUX_I1" input="ALUT.O6"   output="F7AMUX.I1">
     <pack_pattern in_port="ALUT.O6" name="LUT5toLUT7" out_port="F7AMUX.I1"/>
     <pack_pattern in_port="ALUT.O6" name="LUT5toLUT8" out_port="F7AMUX.I1"/>
    </direct>
    <direct name="F7AMUX_S"  input="COMMON_LUT_AND_F78MUX.AX" output="F7AMUX.S" />
    <!-- F7BMUX inputs -->
    <direct name="F7BMUX_I0" input="DLUT.O6"   output="F7BMUX.I0">
     <pack_pattern in_port="DLUT.O6" name="LUT5toLUT7" out_port="F7BMUX.I0"/>
     <pack_pattern in_port="DLUT.O6" name="LUT5toLUT8" out_port="F7BMUX.I0"/>
    </direct>
    <direct name="F7BMUX_I1" input="CLUT.O6"   output="F7BMUX.I1">
     <pack_pattern in_port="CLUT.O6" name="LUT5toLUT7" out_port="F7BMUX.I1"/>
     <pack_pattern in_port="CLUT.O6" name="LUT5toLUT8" out_port="F7BMUX.I1"/>
    </direct>
    <direct name="F7BMUX_S"  input="COMMON_LUT_AND_F78MUX.CX" output="F7BMUX.S" />
    <!-- F8MUX inputs -->
    <direct name="F8MUX_I0"  input="F7BMUX.O"  output="F8MUX.I0">
     <pack_pattern in_port="F7BMUX.O" name="LUT5toLUT8" out_port="F8MUX.I0"/>
    </direct>
    <direct name="F8MUX_I1"  input="F7AMUX.O"  output="F8MUX.I1">
     <pack_pattern in_port="F7AMUX.O" name="LUT5toLUT8" out_port="F8MUX.I1"/>
    </direct>
    <direct name="F8MUX_S"   input="COMMON_LUT_AND_F78MUX.BX" output="F8MUX.S" />

    <direct name="F7AMUX_O"  input="F7AMUX.O" output="COMMON_LUT_AND_F78MUX.F7AMUX_O" />
    <direct name="F7BMUX_O"  input="F7BMUX.O" output="COMMON_LUT_AND_F78MUX.F7BMUX_O" />
    <direct name="F8MUX_O"   input="F8MUX.O" output="COMMON_LUT_AND_F78MUX.F8MUX_O" />
  </interconnect>
  <metadata>
    <meta name="type">block</meta>
    <meta name="subtype">ignore</meta>
  </metadata>
</pb_type>

Model XML

<models xmlns:xi="http://www.w3.org/2001/XInclude">
 <xi:include href="muxes/f6mux/f6mux.model.xml"   xpointer="xpointer(models/child::node())" />
 <xi:include href="muxes/f7amux/f7amux.model.xml" xpointer="xpointer(models/child::node())" />
 <xi:include href="muxes/f7bmux/f7bmux.model.xml" xpointer="xpointer(models/child::node())" />
 <xi:include href="muxes/f8mux/f8mux.model.xml"   xpointer="xpointer(models/child::node())" />
 <xi:include href="Nlut/alut.model.xml" xpointer="xpointer(models/child::node())" />
 <xi:include href="Nlut/blut.model.xml" xpointer="xpointer(models/child::node())" />
 <xi:include href="Nlut/clut.model.xml" xpointer="xpointer(models/child::node())" />
 <xi:include href="Nlut/dlut.model.xml" xpointer="xpointer(models/child::node())" />
</models>

Table Of Contents

• common_lut_and_f78mux
  • Physical Block XML
  • Model XML

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