symbiflow-arch-defs
symbiflow-arch-defs

BB

Component Diagram

`default_nettype none module BB(input I, T, output O, inout B); assign B = T ? 1'bz : I; assign O = B; endmodule

Verilog File

`default_nettype none
module BB(input I, T, output O, inout B);
assign B = T ? 1'bz : I;
assign O = B;
endmodule

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